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Samson Towers, 821, 8th Floor, Pantheon Rd, Sulaiman Zackria Avenue, Egmore, Village, Tamil Nadu 600008, India
Job Detail
  • Industry:
    IT - Hardware
  • Total Positions:
  • Job Type:
    Full Time
  • Salary:
  • Job Location:
    bangalore, India
  • Minimum Education:
  • Minimum Experience:
    4 Years
  • Apply By:
    Sep 22, 2018
  • Job Posting Date:
    May 22, 2018
Job Description

Strong knowledge and experience in Scan Insertion, TestKompression, ATPG, Memory BIST and JTAG at IC –level for mixed signal designs

Experience in using Mentor DfT tools, Cadence RC and simulator tools Define DfT Strategy and Requirement Specification for the design

DfT verification for gate-level and timing simulations

Work cross sites with design team to define and implement DfT.

Hands on experience in solving DfT problems, simulation failures, ATPG coverage and DRC improvements.

Work with STA engineer to define timing constraints for DfT modes

Support Test engineer in silicon debug and pattern delivery for ATE

Experience in RTL coding, shell scripting

Experienced in handling analog DfT simulations

Be fluent with all common concepts of DfT and DfT tools


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