163, Afghan Ln, Delhi Gate, Nai Basti, Chatta Mohalla, Ghaziabad, India
Feb 01, 2019
Job Posting Date:
Jan 03, 2019
Minimum 3 years of experience.
Must have good knowledge on the verification flows
Excellent hands-on debug skills and problem solving attitude.
Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC
Experience of working on Functional Verification, SoC Verification, Emulation
Good in programming : System Verilog, PLI/DPI interface, C/C++, PERL/Shell script, assembly language
OVM/UVM Methodology knowledge and experience
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